93 lines
2.0 KiB
Go
93 lines
2.0 KiB
Go
package gb
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import (
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"fmt"
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)
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// 0x0000 - 0x3FFF : ROM Bank 0
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// 0x4000 - 0x7FFF : ROM Bank 1 - Switchable
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// 0x8000 - 0x97FF : CHR RAM
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// 0x9800 - 0x9BFF : BG Map 1
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// 0x9C00 - 0x9FFF : BG Map 2
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// 0xA000 - 0xBFFF : Cartridge RAM
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// 0xC000 - 0xCFFF : RAM Bank 0
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// 0xD000 - 0xDFFF : RAM Bank 1-7 - switchable - Color only
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// 0xE000 - 0xFDFF : Reserved - Echo RAM
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// 0xFE00 - 0xFE9F : Object Attribute Memory
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// 0xFEA0 - 0xFEFF : Reserved - Unusable
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// 0xFF00 - 0xFF7F : I/O Registers
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// 0xFF80 - 0xFFFE : Zero Page
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type Bus struct {
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Cart *Cartridge
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RAM *RAM
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}
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func NewBus(cart *Cartridge) *Bus {
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bus := Bus{Cart: cart, RAM: NewRAM()}
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return &bus
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}
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func (bus *Bus) Read(address uint16) byte {
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if address < 0x8000 {
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// ROM data
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value, err := bus.Cart.Read(address)
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if err != nil {
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fmt.Printf("Error reading from bus address %X: %s", address, err)
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return 0
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}
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return value
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} else if address < 0xE000 {
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//WRAM (Working RAM)
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return bus.RAM.WRAMRead(address)
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} else if address < 0xFF80 {
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//IO Registers
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return IORead(address)
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} else {
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fmt.Printf("Reading from bus address %X not implemented!\n", address)
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return 0
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}
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}
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func (bus *Bus) Read16(address uint16) uint16 {
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lo := bus.Read(address)
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hi := bus.Read(address + 1)
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return uint16(lo) | uint16(hi)<<8
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}
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func (bus *Bus) Write(address uint16, value byte) error {
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if address < 0x8000 {
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// ROM data
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err := bus.Cart.Write(address, value)
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if err != nil {
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return fmt.Errorf("Error writing to bus address %X: %s", address, err)
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}
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return nil
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} else if address < 0xE000 {
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//WRAM (Working RAM)
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bus.RAM.WRAMWrite(address, value)
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return nil
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} else if address < 0xFF80 {
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//IO Registers
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IOWrite(address, value)
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return nil
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} else {
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return fmt.Errorf("Writing to bus address %X not implemented!", address)
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}
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}
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func (bus *Bus) Write16(address uint16, value uint16) error {
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err := bus.Write(address+1, byte((value>>8)&0xFF))
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if err != nil {
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return err
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}
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err = bus.Write(address, byte(value&0xFF))
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if err != nil {
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return err
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}
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return nil
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}
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